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Blockchain Capital and 1kx Co-Lead $33M Series A for Fabric Cryptography

August 19, 2024
in News
Reading Time: 2 mins read
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Quick take:

  • The fundraising also attracted participation from Offchain Labs, Polygon and Matter Labs.
  • The company is building a “Venrifieable Processing Unit” VPU custom silicon chip tailored for cryptography.
  • The new chips are scheduled to go into production later in 2024, the company said.

Fabric Cryptography, a crypto hardware startup founded by a team of “more than 60 AI hardware and software veterans, cryptographers and cypherpunks” raised $33 million in a Series A round co-led by Blockchain Capital and 1kx, with participation from Offchain Labs, Polygon and Matter Labs.

The company said in a press release on Monday that the fresh capital will be used to build computing chips, and develop software and cryptographic algorithms.

Fabric is building a “ Verifiable Processing Unit” VPU, a custom silicon chip made specifically for cryptography. This part of Fabric’s mission is to address the “age-old human problems”, which come amidst a rapidly advancing society in terms of technology and ambitions.

“Amidst today’s vibrant ecosystem of deep tech startups aiming to return humanity to the moon, bring commercial fusion to life, and build safe artificial general intelligence,” Fabric describes itself as a “community-driven deep tech engine solving the hardest problems in trust,” founder and CEO Michael Gao wrote in a blog post published earlier in August.

According to the announcement, Fabric’s VPU is “the first custom silicon chip that uses an instruction set architecture specific to cryptography,” allowing any cryptographic algorithm to be broken down into its mathematical building blocks. 

The company plans to start producing the new chip later in 2024. According to Fabric, the VPUs drastically “improve the speed and cost of running advanced cryptographic workloads, compared to CPUs, GPUs and fixed-function cryptography.” The company is also developing a full compiler stack and acceleration libraries to ensure the chips are easy to program and use.


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